Serial data transferring apparatus

ABSTRACT

A master unit sends a start signal to a slave unit. When receiving the start signal from the master unit, the slave unit sends, to the master unit, a synchronization field that is a data train (pulse signal) indicative of a transfer clock with which the slave unit is able to perform transferring and receiving operations. The master unit sends, to the slave unit, command data in accordance with the transfer clock indicated by the synchronization field sent from the slave unit. In response to the command data sent from the master unit, the slave unit sends, to the master unit, response data in accordance with the transfer clock indicated by the synchronization field. Thus, in a communication system employing a serial data transferring apparatus of the present invention, the master unit establishes the synchronization for the data transfer, while the slave unit is free from a burden of establishing the synchronization for the data transfer. A serial data transferring apparatus is realized which can simplify the structure of the slave unit, cut the total cost, and reduce noise.

TECHNICAL FIELD

The present invention relates to a serial data transferring apparatus,which requires synchronization in data transfer to be establishedbetween the receiving side and the transmitting side.

BACKGROUND ART

In serial data transfer, synchronization for transfer must beestablished so that data is transferred between the receiving side andthe transmitting side. For this reason, a quartz oscillator having highoscillation accuracy has been used, or a PLL (Phase-Locked Loop) or thelike has been used to realize frame synchronization for the purpose ofestablishing the synchronization in data transfer with higher accuracy.

Because of the quartz oscillator and the PLL being expensive, however,it has been difficult to realize an inexpensive sensor device, actuatordevice, etc. which can realize the serial data transfer.

Accordingly, the inexpensive sensor device is mainly employed in thesignal transfer using an analog voltage, and this type of signaltransfer has limitations in transfer distance and transfer accuracy.

With that problem in mind, there is proposed a start-stopsynchronization data transfer method for transferring serial data withan oscillator having low frequency accuracy, as disclosed in JP,A2000-196700.

The disclosed start-stop synchronization data transfer method requiresneither the expensive quartz oscillator nor the PLL.

DISCLOSURE OF THE INVENTION

However, the start-stop synchronization data transfer method requires aCR oscillator oscillating at frequency several hundreds times as high asa transfer clock of the data, and a digital circuit, e.g., a counter,which operates at the oscillation frequency of the CR oscillator anddetects the transfer clock to establish the synchronization.

In the prior art described above, therefore, the transfer clock islimited by the highest oscillation frequency of the CR oscillator andthe highest operation frequency of the digital circuit. This has inviteda limitation in increasing the transfer clock frequency beyond such alimit.

Also, because an analog circuit handling a minute voltage is affected bynoises generated from the CR oscillator and the digital circuit eachoperating at the high frequency, a resulting deterioration of accuracyhas raised a difficulty in applying the prior-art method to a sensordevice handling a minute signal.

Further, because of requiring the CR oscillator and the digital circuit,e.g., the counter, as mentioned above, a scale of an overall digitalcircuit for establishing the synchronization is increased. For thatreason, it has also been difficult to realize an inexpensive sensordevice, actuator device, etc. which can realize the serial datatransfer.

An object of the present invention is to provide a serial datatransferring apparatus, which is inexpensive and can reduce noise.

To achieve the above object, the present invention is constituted asfollows:

-   (1) A serial data transferring apparatus comprises means for    receiving a start signal indicative of start of data transfer from    the transmitting side; means for determining that the receiving    means has received the start signal, and generating a data train    indicative of a transfer clock of serial data to be transmitted; and    serial data output means for outputting the data train indicative of    the transfer clock to the transmitting side.-   (2) In above (1), preferably, after replying the data train    indicative of the transfer clock of the serial data to the    transmitting side, the receiving means receives a train of serial    data transmitted from the transmitting side in accordance with the    transfer clock.-   (3) In above (1), preferably, information indicative of a target,    which is going to receive the start signal, is superimposed on the    start signal.-   (4) In above (3), preferably, information indicative of the target,    which is going to receive the start signal, is represented by the    number of pulses.-   (5) In above (1), preferably, the start signal is a signal having a    state fixed to a low level or a high level for a certain period and    containing information indicative of a target of transmission.-   (6) In above (1), preferably, the serial data transferring apparatus    further comprises analog data output means and selecting means for    selectively changing over the analog data output means and the    serial data output means, wherein upon receiving the start signal,    the selecting means changes over output means from the analog data    output means to the serial data output means.-   (7) In above (6), preferably, the serial data transferring apparatus    according further comprises a sensing element for detecting a    physical variable of a target to be measured; adjusting means for    adjusting a detected value from the sensing element to a    predetermined characteristic, and storage means for storing    characteristic data that is the predetermined characteristic to be    adjusted by the adjusting means and is transmitted from the    transmitting side, wherein the start signal is a signal having a    predetermined voltage level and the voltage of the start signal is    employed as a voltage source for storing the characteristic data in    the storage means.-   (8) A serial data transferring apparatus comprises means for    transmitting a start signal indicative of start of data transfer to    a particular receiving side; means for receiving a data train    indicative of a transfer clock of serial data transmitted from the    particular receiving side; and means for transmitting serial data to    the particular receiving side in sync with the transfer clock of the    serial data transmitted from the particular receiving side.-   (9) In a serial data transferring apparatus comprising a master unit    transmitting-serial data and a slave unit receiving the serial data,    the master unit comprises means for transmitting a start signal    indicative of start of data transfer to a particular slave unit,    means for receiving a data train indicative of a transfer clock of    serial data transmitted from the slave unit, and means for    transmitting serial data to the slave unit in sync with the transfer    clock of the serial data transmitted from the slave unit, and the    slave unit comprises means for receiving a start signal indicative    of start of data transfer from the master unit; means for    determining that the receiving means has received the start signal,    and generating a data train indicative of a transfer clock of serial    data to be transmitted; and serial data output means for outputting    the data train indicative of the transfer clock to the master unit.-   (10) A serial data transferring apparatus comprises means for    transmitting, to the transmitting side, a start signal indicative of    start of data transfer and a data train indicative of a transfer    clock of serial data to be received; and means for, after    transmitting the data train indicative of the transfer clock of the    serial data to the transmitting side, receiving a train of serial    data transmitted from the transmitting side in accordance with the    transfer clock.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of a data communication sequence in a serial datatransferring apparatus according to a first embodiment of the presentinvention.

FIG. 2 is a diagram showing a system configuration for the serial datatransferring apparatus according to the first embodiment.

FIG. 3 is a block diagram showing an internal configuration of a masterunit and a slave unit in the serial data transferring apparatusaccording to the first embodiment.

FIG. 4 is a flowchart showing a control sequence of the slave unitaccording to the first embodiment.

FIG. 5 is a timing chart of signals in the first embodiment.

FIG. 6 is a diagram showing a bit configuration of command data andresponse data in the first embodiment.

FIG. 7 is a timing chart of signals in a modification of the firstembodiment.

FIG. 8 is an illustration showing a bit configuration of command dataand response data used in the modification of the first embodiment.

FIG. 9 is a diagram showing a modification of the communication sequencein the serial data transferring apparatus according to the firstembodiment.

FIG. 10 is a diagram showing a modification of the communicationsequence in the serial data transferring apparatus according to thefirst embodiment.

FIG. 11 is a diagram showing a system configuration of a serial datatransferring apparatus according to a second embodiment of the presentinvention.

FIG. 12 is a timing chart of signals in the serial data transferringapparatus according to the second embodiment.

FIG. 13 is a waveform chart of a start signal used in a serial datatransferring apparatus according to a third embodiment of the presentinvention.

FIG. 14 is a diagram showing a production line of sensor devices eachincluding a serial data transferring apparatus according to a fourthembodiment of the present invention.

FIG. 15 is a block diagram of the sensor device including the serialdata transferring apparatus according to the fourth embodiment.

FIG. 16 is a timing chart of signals in the sensor device including thefourth embodiment.

FIG. 17 is a timing chart of signals in a modification of the sensordevice including the fourth embodiment.

BEST MODE FOR CARRYING OUT THE INVENTION

Embodiments of the present invention will be described below withreference to the accompanying drawings.

At the outset, a serial data transferring apparatus according to a firstembodiment of the present invention will be described with reference toFIGS. 1, 2, 3, 4, 5 and 6.

FIG. 1 shows a data communication sequence in a serial data transferringapparatus according to the first embodiment of the present invention,and FIG. 2 shows a schematic system configuration for the serial datatransferring apparatus according to the first embodiment.

Also, FIG. 3 shows an internal configuration of a master unit and aslave unit in the serial data transferring apparatus according to thefirst embodiment of the present invention, and FIG. 4 shows a controlsequence of the slave unit in the serial data according to the firstembodiment of the present invention.

FIG. 5 is a timing chart of transfer data in the first embodiment of thepresent invention, and FIG. 6 shows a bit configuration of command dataand response data in the first embodiment of the present invention.

With reference to FIG. 1, a description is first made of the datacommunication sequence in the serial data transferring apparatusaccording to the first embodiment of the present invention.

In the data communication sequence in the serial data transferringapparatus according to the first embodiment of the present invention, amaster unit 1 first sends a start signal to a slave unit 2. Whenreceiving the start signal from the master unit 1, the slave unit 2sends, to the master unit 1, a synchronization field that is a datatrain (pulse signal) indicative of a transfer clock with which the slaveunit 2 is able to perform transferring and receiving operations.

Then, the master unit 1 sends, to the slave unit 2, command data inaccordance with the transfer clock indicated by the synchronizationfield sent from the slave unit 2. In response to the command data sentfrom the master unit 1, the slave unit 2 sends, to the master unit 1,response data in accordance with the transfer clock indicated by thesynchronization field.

Thus, in a communication system employing the serial data transferringapparatus according to the first embodiment of the present invention,the master unit 1 establishes the synchronization for the data transfer,while the slave unit 2 is free from a burden of establishing thesynchronization for the data transfer.

The expression “master unit” is used herein for the reason that themaster unit 1 serves as a manager (master) for sending the start signalto the slave unit 2 and starting communication with respect to the slaveunit 2. In other words, the first embodiment of the present invention isconstructed such that the master unit 1 generating the start signal andrequesting communication performs serial communication in match with theoperation clock of the slave unit 2 having no precise clock.

The system configuration for the serial data transferring apparatusaccording to the first embodiment of the present invention will next bedescribed with reference to FIG. 2.

By employing the serial data transferring apparatus according to thefirst embodiment of the present invention, as shown in FIG. 2,one-to-one communication can be realized between a master unit 3 andslave units 4, 5, 6, 7, 8 and 9 each of which is connected to the masterunit 3 by a single line.

Further, the master unit 3 and the slave units 4, 5, 6, 7, 8 and 9 areeach provided with an open-drain or open-collector output driver forrealizing two-way communication therebetween.

In an illustrated example of the system configuration, the master unit 3serves as a controller for collecting information from a plurality ofslave units 4, 5 and 6, which are sensors, and controlling a pluralityof slave units 7, 8 and 9, which are actuators.

In such a system employing the serial data transferring apparatusaccording to the first embodiment of the present invention, the masterunit 3 solely takes a burden of establishing the synchronization for thedata transfer, while the slave units 4, 5, 6, 7, 8 and 9 are free fromthe burden of establishing the synchronization for the data transfer. Asa result, the construction of each of the slave units 4, 5, 6, 7, 8 and9 can be simplified.

With the construction described above, even the slave units 4, 5, 6, 7,8 and 9 in the form of sensors and actuators, which are constructed ofprimarily analog circuits, can be inexpensively incorporated in anapparatus for serially transferring digital signals.

Also, since the synchronization for the data transfer is establishedonly on the side of the master unit 3 instead of establishing thesynchronization for the data transfer on the side of each of the slaveunits 4, 5, 6, 7, 8 and 9 as practiced in the above-mentioned prior art,the number of circuits required in an overall system for establishingthe synchronization for the data transfer can be reduced and the serialdata transfer can be realized without considerably increasing thecircuit scale as a whole of the system.

In the case of trying to establish the synchronization for the datatransfer on the side of each of the slave units 4, 5, 6, 7, 8 and 9, theslave units 4, 5, 6, 7, 8 and 9 are each required to include a digitalcircuit, e.g., a counter, for establishing the synchronization with anoscillator that oscillates signals at frequency several hundreds timesas high as the data transfer rate.

However, if such a digital circuit or the like is provided, however, thehigh-frequency oscillator and the digital circuit operating at the highfrequency become serious noise sources in, e.g., a sensor handling aminute signal.

For that reason, the frequency of the oscillator and the operatingfrequency of the digital circuit cannot be increased. Further, in thecase of establishing the synchronization for the data transfer on theside of each of the slave units 4, 5, 6, 7, 8 and 9 as practiced in theabove-mentioned prior art, a maximum transfer clock is limited by theslave unit having the lowest transfer clock and the system transferclock cannot be increased beyond it.

In contrast, with the first embodiment of the present invention, theserial transfer can be performed in accordance with even a maximum oneamong clocks of the slave units 4, 5, 6, 7, 8 and 9, and hence thecommunication rate in the overall system can be increased.

Further, when a controller is assumed as an application target of themaster unit 3, a microcomputer is used as the controller in many casesbecause absolute time management is required for the data transfer and alarge amount of arithmetic processing is needed. An apparatus utilizinga microcomputer for that purpose includes a high-frequency quartzoscillator for operating the microcomputer and many high-frequencydigital circuits in most cases.

Accordingly, it is easier to install a circuit for establishing thesynchronization for the data transfer in the master unit 3 as comparedwith the slave units 4 to 9 (namely, there is no difficulty ininstalling a digital circuit operating at high frequency because themaster unit 3 already includes a high-frequency oscillator).

The general internal configuration of the master unit 1 and the slaveunit 2 in the serial data transferring apparatus according to the firstembodiment of the present invention will next be described withreference to FIG. 3.

The master unit 1 in the serial data transferring apparatus according tothe first embodiment of the present invention comprises a microcomputer10 for collecting information from the slave units serving as sensorsand controlling actuators, a quartz oscillator 11 for generating a basicclock signal for operating the microcomputer 10, a start signalgenerator 15 for generating a start signal, a clock detection circuit 12for detecting a transfer clock from a synchronization field, atransmitting circuit 14 for sending command data, a receiving circuit 13for receiving response data, a pull-up resistor 16 for pulling up asignal line, transistors 17, 18 for driving the signal line, and aselector 19 for selectively changing over connection to the slave units.

The start signal generator 15, the clock detection circuit 12, thetransmitting circuit 14, and the receiving circuit 13 are controlledwith the operation of the microcomputer 10.

The slave unit 2 in the serial data transferring apparatus according tothe first embodiment of the present invention comprises a pull-upresistor 20 for pulling up a signal line, a transistor 21 for drivingthe signal line, a shift register 22 for executing serial/parallelconversion of the command data and the response data, an AND gate 23 forcontrolling an input and an output of the slave unit 2, a controlcircuit 24 for detecting the start signal, making an input/output to andfrom the shift register 22, and applying a signal to the AND gate 23,and a CR oscillator 25 for generating a clock signal to operate thecontrol circuit 24 and the shift register 22.

The operations of the master unit 1 and the slave unit 2 will bedescribed below. It is assumed that the command data and the responsedata are each in the form of a data train having 6 bits as informationbits, as shown in FIG. 6.

Referring to FIG. 4, in step 100, the control circuit 24 of the slaveunit 2 first outputs a low-level signal to the AND gate 23, therebyturning off the transistor 21. Then, the slave unit 2 waits in step 101until, as shown in FIG. 5, the master unit 1 sends the start signal andthe signal line takes a high level.

When issuing a communication request to the slave unit 2, the masterunit 1 selects the slave unit 2 by the selector 19 and outputs the startsignal from the start signal generator 15 (turns the signal line to ahigh level).

Upon receiving the start signal, the slave unit 2 proceeds to step 102in which the control circuit 24 outputs a high-level signal to the ANDgate 23. Then, in step 103, a binary number of 010101 is written in theshift register 22.

Subsequently, in step 104, the shift register 22 waits for 6 clocks. Instep 105, the control circuit 24 outputs a low-level signal to the ANDgate 23.

Thus, by causing the shift register 22 to always perform the shiftoperation in accordance with a clock signal from the CR oscillator 25,the data 010101 written in the shift register 22 is outputted to thesignal line through the AND gate 23 and the transistor 21 so that thedata 101010 is outputted to the signal line. This data serves as dataindicating ½ of the transfer clock of the slave unit 2.

In the present invention, the data indicating ½ of the transfer clock iscalled a synchronization field. The master unit 1 detects the transferclock signal from the synchronization field by the clock detector 12 andsends the command data from the transmitting circuit 14.

As shown in FIG. 5, the command data is outputted in phase with thesignal of 101010 in the synchronization field.

With the process described above, the command data can be accuratelytransferred to the shift register 22 just by causing the shift register22 of the slave unit 2 to perform the shift operation in accordance withthe output clock of the CR oscillator 25.

Accordingly, after the control circuit 24 has sent the data of thesynchronization field, the slave unit 2 can read the command data justby waiting for 6 clocks in step 106 and then reading the shift register25 in step 107.

Then, the slave unit 2 interprets the read command data in step 108,outputs a high-level signal to the AND gate 23 in step 109, and writesthe response data in the shift register 22 in step 110. The responsedata written in the shift register 22 is hence outputted to the signalline through the AND gate 23 and the transistor 21.

The master unit 1 reads the response data, which has been outputted tothe signal line, by the receiving circuit 13, thereby completing thecommunication with respect to the slave unit 2.

Thus, with the serial data transferring apparatus according to the firstembodiment of the present invention, the slave unit 2 can be constructedof a very simple structure.

Also, since there is no vain time in realizing the data communication,the transmitting and receiving operations can be realized at a highrate.

Further, the oscillation frequency of the CR oscillator 25 may be equalto the frequency of the transfer clock, and the oscillation frequencyseveral hundred times as high as the transfer clock is no longerrequired. Hence, there occurs no problem of noise, which is otherwisecaused with the provision of a high-frequency oscillator.

A modification of the serial data transferring apparatus according tothe first embodiment of the present invention will now be described withreference to FIG. 7. FIG. 7 is a timing chart of signals in themodification of the first embodiment. As seen from comparison with theembodiment shown in FIG. 5 wherein no substantial phase differenceexists between the command data and the synchronization field, themodification shown in FIG. 7 differs from the embodiment shown in FIG. 5in that the command data is delayed in phase by a ¼-clock cycle relativeto the synchronization field in the modification shown in FIG. 7.

With the modification shown in FIG. 7, the input timing can be morereliably secured for the shift register 22.

More specifically, because by causing the shift register 22 performs theshift operation just in accordance with the output clock of the CRoscillator 25, inputting to the shift register 22 is executed at therising edge and the falling edge of the synchronization field.

Therefore, if the command data is synchronized with the rising edge andthe falling edge of the synchronization field, there is a possibilitythat a hold time and a setup time required for the shift register 22 toinput the command data may be insufficient.

To eliminate such a possibility, the rising of the command data isdelayed in phase by a ¼-clock cycle relative to the synchronizationfield so that the hold time and the setup time are reliably secured.

Furthermore, since the time of ¼-clock cycle is present until thecommand data is transmitted after receiving the synchronization field, asufficient processing time for the microcomputer 10 can also be secured.

Incidentally, the delay in phase is not limited to the ¼-clock cycle,and it may be set to any suitable predetermined value.

Another modification of the serial data transferring apparatus accordingto the first embodiment of the present invention will now be describedwith reference to FIG. 8.

FIG. 8 is an illustration showing a bit configuration of the commanddata and the response data used in the modification of the firstembodiment.

In this another modification, the bit configuration of the command dataand the response data used in the serial data transferring apparatus isset to include a start bit as shown in FIG. 8. With the presence of thestart bit, start-stop synchronization can be realized and thereforephase matching is facilitated.

Furthermore, since a parity bit is also included, reliability of thecommunication can be improved.

Still another modification of the serial data transferring apparatusaccording to the first embodiment of the present invention will now bedescribed with reference to FIG. 9.

FIG. 9 is a diagram for explaining a communication sequence in stillanother modification of the first embodiment. In the modification shownin FIG. 9, the response data is not sent from the slave unit 2. Thismodification is adapted for the case of the slave unit 2 being anactuator or the like because, in such a case, the communication justrequires outputting from the master unit 1 to the slave unit 2 and thereis no necessity of sending a response.

Still another modification of the serial data transferring apparatusaccording to the first embodiment of the present invention will now bedescribed with reference to FIG. 10. The modification of FIG. 10 isshown as a diagram for explaining a communication sequence in the serialdata transferring apparatus according to the first embodiment. In themodification shown in FIG. 10, the command data is not sent from themaster unit 1.

This modification is adapted for the case of the slave unit 2 being asensor or the like because, in such a case, the communication justrequires outputting of a measured result from the slave unit 2 to themaster unit 1 and there is no necessity of receiving the command data.

However, when the sensor serving as the slave unit 2 has a plurality ofmeasuring points or measures a plurality of physical variables, or whenthe sensor has the function such as failure diagnosis, the command datais of course required. In addition, the command data is effective inchanging over the measuring points or the measured physical quantitiesfrom one to another, or making a shift to a diagnosis mode.

A serial data transferring apparatus according to a second embodiment ofthe present invention will be described below with reference to FIGS. 11and 12.

FIG. 11 shows a general system configuration of the serial datatransferring apparatus according to the second embodiment of the presentinvention, and FIG. 12 is a timing chart of signals in the serial datatransferring apparatus according to the second embodiment of the presentinvention.

In FIG. 11, the system configuration of the serial data transferringapparatus according to the second embodiment of the present invention isdesigned as a one-to-multiple communication system in which one signalline extended from a master unit 26 is connected to slave units 27, 28and 29; namely one master unit 26 is communicated with a plurality ofslave units.

In a communication system according to the second embodiment of thepresent invention, as shown in FIG. 12, information representing anaddress of each slave unit (e.g., an address 2 of the slave unit 27, anaddress 3 of the slave unit 28, and an address 4 of the slave unit 29)is superimposed, as the number of pulses, on the start signal from themaster unit 26.

Accordingly, which one of the slave units 27, 28 and 29 has beenselected can be identified by monitoring the signal line with twocomparators having thresholds different from each other, detecting thestart signal with the comparator having a first threshold, detectingpulses in the signal indicative of the address with the comparatorhaving a second threshold, and counting the number of detected pulses.

In the embodiment shown in FIG. 12, since the number of pulsessuperimposed on the start signal is four, the slave unit having theaddress 4, i.e., the slave unit 29, is selected.

With the construction described above, even when the synchronization isnot established between the master unit 26 and the slave units 27, 28and 29, selected information can be transferred to each of the slaveunits 27, 28 and 29.

Then, as in the first embodiment, the selected slave unit (slave unit 29in the embodiment of FIG. 12) replies the synchronization field,receives the command data, and replies the response data.

As another method for superimposing information indicative of theaddress of the slave unit on the start signal, it is also conceivable tochange an amplitude, a pulse width, etc. of the start signal inaccordance with the address of the slave unit.

Thus, the second embodiment of the present invention can also providesimilar advantages to those obtainable with the first embodiment.

A serial data transferring apparatus according to a third embodiment ofthe present invention will be described below with reference to FIG. 13.FIG. 13 shows a waveform of the start signal used in the serial datatransferring apparatus according to the third embodiment of the presentinvention.

In the third embodiment of the present invention, the start signal usedin the above-described second embodiment is modified as shown in FIG.13. More specifically, the start signal is made up of two blanks (eachmeaning a state where a signal is absent for a certain period), andpulses indicative of the address of the slave unit are superimposedbetween the two blanks.

The use of the start signal formed as shown in FIG. 13 can also providesimilar advantages to those obtainable with the first embodiment.

A serial data transferring apparatus according to a fourth embodiment ofthe present invention will be described below with reference to FIGS.14, 15 and 16. FIG. 14 is a diagram for explaining a production line ofsensor devices each including a serial data transferring apparatusaccording to a fourth embodiment of the present invention, FIG. 15 is ablock diagram of the sensor device including the serial datatransferring apparatus according to the fourth embodiment, and FIG. 16is a timing chart of signals in the sensor device according to thefourth embodiment.

In the manufacturing line shown in FIG. 14, sensor devices 31, 32, 33,34 and 35 are transported to flow successively along the production linefrom the left to the right, as viewed in FIG. 14, relative to acheck/adjustment device 30. In the state shown in FIG. 14, the sensordevice 33 is connected to the check/adjustment device 30.

The serial data transferring apparatus according to any of the first tothird embodiments of the present invention is incorporated in each ofthe sensor devices 31, 32, 33, 34 and 35. By connecting thecheck/adjustment device 30 to each of the sensor devices 31, 32, 33, 34and 35 in turn, it is possible to write data, for example, in aninternal monitor of the sensor device or an EPROM therein for storingadjustment information through one signal line by utilizing theincorporated communication apparatus.

Further, the use of only one signal line enables a signal terminal to beadditionally provided in a connector or the like. Even after completeassembly of the sensor device, therefore, data can be written in theinternal monitor of the sensor device or the EPROM therein for storingadjustment information.

Because of the sensor device being mechanically or electrically verysensitive, there is a very strong demand for a capability of adjustingsensor characteristics after complete assembly of the sensor device. Atthe same time, there is also a demand for minimizing the size of arequired circuit to satisfy the above demand.

The serial data transferring apparatus according to the fourthembodiment of the present invention can satisfy those two demands.

The internal configuration of each of the sensor devices 31, 32, 33, 34and 35 will next be described with reference to FIG. 15.

The sensor device including the fourth embodiment of the presentinvention comprises a sensing element 41 in which a physical variablechanges depending on a measured quantity, a detection circuit 40 forconverting a change of the physical variable in the sensing element 41into an electrical signal, an adjustment circuit 39 for adjusting anoutput of the detection circuit 40 to a predetermined characteristic, ananalog voltage output circuit 38 for outputting, as an analog voltage,an output of the adjustment circuit 39 to the exterior, a communicationcircuit 37 for executing communication with respect to the exterior, aselector 42 for changing over an output signal between the analogvoltage outputted from the analog voltage output circuit 38 and acommunication signal connected to the communication circuit, an EPROM 39for storing adjustment information based on which the adjustment circuit39 adjusts the characteristic, and a connector 43 for mechanicallyfixing signal terminals for a control signal and the output signal.

The operation of the sensor device including the fourth embodiment ofthe present invention will next be described with reference to FIG. 16.

In the sensor device including the fourth embodiment, the selector 42 iscontrolled in accordance with a control signal so that the outputterminal is selectively changed over between the state of outputting theanalog voltage and the state of performing communication.

More specifically, when the control signal is at 0 V, the analog voltageoutput circuit 38 is connected to the output signal and the analogvoltage corresponding to a value measured by the sensing element 41 isoutputted. When the control signal is at 12 V, the output signal isconnected to the communication circuit 37 so as to allow communicationfrom the exterior.

Because of employing 12 V for the control signal, this voltage can alsobe utilized as a high voltage required for writing data in the PROM 36,and hence a boosting circuit is omitted which must be otherwiseincorporated in the sensor circuit. Also, by setting a threshold for thecontrol signal to a relatively high value, a malfunction is harder tooccur even when noise is imposed on the control signal.

Further, with the fourth embodiment of the present invention, since thecontrol signal is employed as the start signal indicative of the startof communication, the circuit configuration of the communication circuitis simplified. The communication is performed by successivelytransferring, as the output signal, the synchronization field, thecommand data, and the response data in a similar manner to thatdescribed above.

A modification of the serial data transferring apparatus according tothe fourth embodiment of the present invention will be described belowwith reference to FIG. 17. FIG. 17 is a timing chart of signals in amodification of the sensor device including the fourth embodiment.

In this modification, a pulse signal is supplied as the control signaland is also employed as the start signal. The communication is realizedby successively transferring, as the output signal, the command data andthe response data in sync with pulses of the control signal. The use ofthis type of control signal can also provide similar advantages to thoseobtainable with the above embodiments.

The embodiments described above are constructed such that the masterunit 1 transmits the start signal to the slave unit 2 and, in responseto the start signal, the slave unit 2 transmits the synchronizationfield to the master unit 1. As an alternative, the slave unit 2 maytransmit both the start signal and the synchronization field to themaster unit 1 and, in response to the start signal, the master unit 1may transmit the serial data to the slave unit 2 in accordance with thereceived synchronization field.

Industrial Applicability

According to the present invention, synchronization for data transfercan be established without requiring a quartz oscillator, a PLL, or anoscillator oscillating at frequency several hundreds times as high as atransfer clock. Hence, a serial data transferring apparatus can berealized which is inexpensive and is able to reduce noise.

1. Apparatus for synchronizing serial data transmission in a serial datatransferring apparatus comprising: receiving means situated at areceiving side, for receiving a start signal indicative of a start ofdata transfer from a transmitting side; means situated at said receivingside for determining that said receiving means has received the startsignal, and for generating a pulse train having a frequency thatcorresponds to a receiving means serial data transfer clock with whichthe receiving means is able to receive serial data that is to betransmitted; a single signal line for transmitting said start signal,said pulse train, and said serial data between said transmitting sideand said receiving side; serial data output means for sending said pulsetrain indicative of the receiving means serial data transfer clock tothe transmitting side; wherein, after sending said pulse trainindicative of the receiving means serial data transfer clock to thetransmitting side, said receiving means receives a train of serial datatransmitted from the transmitting side in sync with the receiving meansserial data transfer clock.
 2. The serial data transferring apparatusaccording to claim 1, wherein information indicative of a target, whichis to receive the start signal, is superimposed on the start signal. 3.The serial data transferring apparatus according to claim 2, wherein thetarget which is to receive the start signal, is determined by a numberof pulses that are superimposed on the start signal.
 4. The serial datatransferring apparatus according to claim 1, wherein the start signalhas a state fixed to a zero level or a one level and containinginformation indicative of a target of transmission.
 5. Apparatus forsynchronizing serial data transmission in a serial data transferringapparatus comprising: receiving means situated at a receiving side, forreceiving a start signal indicative of start of data transmission from atransmitting side; means, situated at said receiving side, fordetermining that said receiving means has received the start signal, andfor sending to the transmitting side a pulse train having a frequencythat corresponds to a receiving means serial data transfer clock, forreceiving serial data that is to be transmitted from the transmittingside in sync with said receiving means serial data transfer clock;serial data output means, situated at said receiving side, foroutputting the pulse train indicative of said transfer clock to thetransmitting side; analog data output means; selecting means forselectively changing between said analog data output means and saidserial data output means; and a single signal line for transmitting saidstart signal, said pulse train, said analog data, and said serial databetween said transmitting side and said receiving side; wherein, saidselecting means changes from said analog data output means to saidserial data output means upon receiving the start signal.
 6. The serialdata transferring apparatus according to claim 5, further comprising: asensing element for detecting a physical variable of a target to bemeasured; adjusting means for adjusting a detected value from saidsensing element to a predetermined characteristic; and storage means forstoring the predetermined characteristic that is to be adjusted by saidadjusting means and is transmitted from the transmitting side; wherein,the start signal has a predetermined voltage level; and the voltage ofthe start signal is employed as a voltage source for storing thecharacteristic data in said storage means.
 7. Apparatus forsynchronizing serial data transmission in a serial data transferringapparatus comprising: means, situated at a transmitting side, fortransmitting a start signal indicative of a start of data transfer to aparticular receiving side; means, situated at a transmitting side, forreceiving from the particular receiving side a pulse train having afrequency that corresponds to a serial data transfer clock, said pulsetrain being indicative of a receiving-side transfer clock fortransmitted serial data; a single signal line for transmitting saidstart signal, said pulse train, and said serial data between saidtransmitting side and said particular receiving side; and means fortransmitting serial data to the particular receiving side in sync withthe receiving-side serial data transfer clock transmitted from theparticular receiving side.
 8. Apparatus for synchronizing serial datatransmission in a serial data transferring apparatus comprising a masterunit transmitting serial data and a slave unit receiving the serialdata, wherein: said master unit comprises means for transmitting a startsignal indicative of a start of data transfer to a particular slaveunit, receiving means for receiving a pulse train indicative of a slaveunit-side serial data transfer clock transmitted from said slave unit,and means for transmitting serial data to said slave unit in sync withthe slave unit-side transfer clock transmitted from said slave unit; andsaid slave unit comprises means for receiving a start signal indicativeof said start of data transfer from said master unit, means fordetermining that said receiving means has received the start signal, andfor generating a pulse train indicative of a slave unit-side transferclock of serial data to be transmitted, and serial data output means foroutputting the said pulse train indicative of the slave unit-sidetransfer clock to said master unit.
 9. Apparatus for synchronizingserial data transmission in a serial data transferring apparatuscomprising: means, situated at a receiving side, for transmitting, to atransmitting side, a start signal indicative of a start of datatransfer; means, situated at a receiving side, for transmitting a pulsetrain having a frequency that corresponds to a serial data transferclock, said pulse train identifying a receiving-side transfer clock withwhich the receiving means is able to receive serial data; and means,operable after transmission to the transmitting side of the pulse trainidentifying the receiving-side serial data transfer clock, for receivinga train of serial data transmitted from the transmitting side in syncwith the receiving-side transfer clock; a single signal line fortransmitting said start signal, said pulse train, and said serial databetween said transmitting side and said receiving side; and wherein,after transmitting the pulse train indicative of the receiving-sideserial data transfer clock to the transmitting side, said receivingmeans receives a train of serial data transmitted from the transmittingside in sync with the receiving-side transfer clock.